| The Journal of Engineering | |
| Bipolar latch with compensated keep-alive current | |
| 关键词: flip-flops; current comparators; compensation; clocks; circuit simulation; bipolar latch; compensated keep-alive current; clocked differential stage; compensation technique; flip-flops; clocked comparators; maximum clock rate; | |
| DOI : 10.1049/joe.2015.0017 | |
| 来源: DOAJ | |
【 摘 要 】
A permanent current in addition to the main clocked current is sometimes used to increase the maximum clock rate of a bipolar latch. Although it speeds up the activation of a clocked differential stage, it deteriorates the latch function by the additional current in the inactive phase of each differential stage. Thus, a keep-alive current must be kept small with respect to the main clocked current. In this Letter, a compensation technique is shown avoiding the erroneous output of a keep-alive current. It still speeds up the activation of the main transistor pair, but results in a constant symmetric offset without affecting the differential value of the output voltage. In simulations of flip-flops and clocked comparators, this compensated keep-alive current has a much larger effect on the maximum clock rate than the uncompensated keep-alive current used so far.
【 授权许可】
Unknown