Model-based implementation of self-configurable intellectual property modules for image histogram calculation in FPGAs

Ingeniería e Investigación

Daniel Alejandro Romero Ares¹  Alejandro José Cabrera Sarmiento²  Luis Manuel Garcés Socarrás²  Piedad Brox Jiménez³  Santiago Sánchez Solano³ 

[1] Affiliation: Instituto Central de Investigaciones Digitales (ICID), Cuba;Automation and Computation Department, Technologic University of Havana “José Antonio Echeverría” (CUJAE), Cuba.;Instituto de Microelectrónica deSevilla (CSIC/Universidad de Sevilla), Sevilla, España.;

关键词: Digital image processing;    histogram calculation;    FPGA;    xilinx system generator;    MATLAB®/Simulink®;    self-configuration.;   

DOI  :  10.15446/ing.investig.v37n2.62328

来源: DOAJ

【 摘 要 】

This work presents the development of self-modifiable Intellectual Property (IP) modules for histogram calculation using the modelbased design technique provided by Xilinx System Generator. In this work, an analysis and a comparison among histogram calculation architectures are presented, selecting the best solution for the design flow used. Also, the paper emphasizes the use of generic architectures capable of been adjustable by a self configurable procedure to ensure a processing flow adequate to the application requirements. In addition, the implementation of a configurable IP module for histogram calculation using a model-based design flow is described and some implementation results are shown over a Xilinx FPGA Spartan-6 LX45.

【 授权许可】

Unknown