Theoretical Investigation of DIBL Characteristics for Scaled Tri-Gate InGaAs-OI n-MOSFETs Including Sensitivity to Process Variations

IEEE Journal of the Electron Devices Society

Chien-Lin Yu¹  Pin Su¹  Chang-Hung Yu¹  Shu-Hua Wu¹ 

[1] Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan;

关键词: III-V channel;    tri-gate MOSFET;    quantum confinement;    drain-induced barrier lowering (DIBL);    process variation;   

DOI  :  10.1109/JEDS.2016.2628967

来源: DOAJ

【 摘 要 】

This paper investigates the intrinsic drain-induced barrier lowering (DIBL) characteristics of highly-scaled tri-gate n-MOSFETs with InGaAs channel based on ITRS 2021 technology node through numerical simulation corroborated with theoretical calculation. This paper indicates that, when studying short-channel effects in III-V FETs, one has to account for quantum-confinement, or else predictions will be pessimistic. Due to 2-D quantum-confinement, the DIBL of the InGaAs tri-gate devices can be significantly suppressed and be comparable to the Si counterpart. Besides, for highly-scaled InGaAs tri-gate NFETs, the impact of buried-oxide thickness on DIBL becomes minor, and the DIBL sensitivity to the fin-width and gate-length variations can also be suppressed by the quantum-confinement effect. This paper may provide insights for tri-gate device design using III-V high-mobility channel materials.

【 授权许可】

Unknown