Anisotropic transport in tellurene FETs

Micro & nano letters

article

Khairul Alam¹ 

[1] Department of Electrical and Electronic Engineering, East West University

关键词: thermionic emission;    elemental semiconductors;    tunnelling;    carrier mobility;    low-power electronics;    field effect transistors;    silicon;    effective mass;    2D material;    post-silicon era;    anisotropic carrier effective mass;    armchair directions;    anisotropic performance;    tellurene FETs;    performance metrics;    p-channel transistors;    quantum simulation;    heavy carrier mass;    armchair direction;    tunnelling current;    thermionic emission;    lighter carrier mass;    zigzag direction;    mixed tunnelling;    thermionic transport mechanism;    n-channel transistor;    on-state current;    p-channel metrics;    anisotropic transport;    nternational Technology Roadmap for Semiconductors 2026 low operating power device requirements;    sub-threshold slope;    time 0.129 ps;    time 0.117 ps;    Si;   

DOI  :  10.1049/mnl.2020.0372

学科分类：计算机科学（综合）

来源: Wiley

【 摘 要 】

Tellurene, a single layer of tellurium, is a new emerging 2D material and a possible candidate for the post-silicon era. It has anisotropic carrier effective mass in zigzag and armchair directions. Therefore, the study of the anisotropic performance of tellurene FETs is a timely topic. In this work, the authors study the transport mechanism and performance metrics of tellurene n-channel and p-channel transistors using a quantum simulation. Heavy carrier mass in the armchair direction effectively blocks the tunnelling current and the transport is governed by thermionic emission over the potential barrier. On the other hand, lighter carrier mass in the zigzag direction results in a mixed tunnelling and thermionic transport mechanism. The n-channel transistor has an on-state current of 894 μA/μm, a sub-threshold slope of 62 mV/dec, a 9.27 mS/μm transconductance, a 0.129 ps delay, and a 0.046 fJ/μm dynamic power loss. The p-channel metrics are, respectively, 852 μA/μm, 62 mV/dec, 9.24 mS/μm, 0.117 ps, and 0.040 fJ/μm. Both the transistors comply with the International Technology Roadmap for Semiconductors 2026 low operating power device requirements.

【 授权许可】

CC BY|CC BY-ND|CC BY-NC|CC BY-NC-ND