An Improved Equivalent Simulation Model for CMOS Integrated Hall Plates

Sensors

Yue Xu¹ 

[1] School of Electronic Science & Engineering, Nanjing University, Nanjing 210093, China

关键词: hall plate;    simulation model;    non-linear effects;    Verilog-A;   

DOI  :  10.3390/s110606284

来源: mdpi

【 摘 要 】

An improved equivalent simulation model for a CMOS-integrated Hall plate is described in this paper. Compared with existing models, this model covers voltage dependent non-linear effects, geometrical effects, temperature effects and packaging stress influences, and only includes a small number of physical and technological parameters. In addition, the structure of this model is relatively simple, consisting of a passive network with eight non-linear resistances, four current-controlled voltage sources and four parasitic capacitances. The model has been written in Verilog-A hardware description language and it performed successfully in a Cadence Spectre simulator. The model’s simulation results are in good agreement with the classic experimental results reported in the literature.

【 授权许可】

CC BY   
© 2011 by the authors; licensee MDPI, Basel, Switzerland.