Hardware Accelerated Compression of LIDAR Data Using FPGA Devices

Sensors

Anton Biasizzo¹ 

[1] Jozef Stefan Institute, Jamova 39, Ljubljana 1000, Slovenia; E-Mail

关键词: data compression;    LIDAR;    FPGA;    hardware acceleration;   

DOI  :  10.3390/s130506405

来源: mdpi

【 摘 要 】

Airborne Light Detection and Ranging (LIDAR) has become a mainstream technology for terrain data acquisition and mapping. High sampling density of LIDAR enables the acquisition of high details of the terrain, but on the other hand, it results in a vast amount of gathered data, which requires huge storage space as well as substantial processing effort. The data are usually stored in the LAS format which has become the de facto standard for LIDAR data storage and exchange. In the paper, a hardware accelerated compression of LIDAR data is presented. The compression and decompression of LIDAR data is performed by a dedicated FPGA-based circuit and interfaced to the computer via a PCI-E general bus. The hardware compressor consists of three modules: LIDAR data predictor, variable length coder, and arithmetic coder. Hardware compression is considerably faster than software compression, while it also alleviates the processor load.

【 授权许可】

CC BY   
© 2013 by the authors; licensee MDPI, Basel, Switzerland.