Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V †

Journal of Low Power Electronics and Applications

Nobuyuki Sugii¹  Yoshiki Yamamoto¹  Hideki Makiyama¹  Tomohiro Yamashita¹  Hidekazu Oda¹  Shiro Kamohara¹  Yasuo Yamaguchi¹  Koichiro Ishibashi³  Tomoko Mizutani² 

[1] Low-Power Electronics Association & Project, Tsukuba, Ibaraki 305-8569, Japan; E-Mails:;Institute of Industrial Science, The University of Tokyo, Meguro, Tokyo 153-8505, Japan; E-Mails:;Department of Engineering Science, Graduate School of Informatics and Engineering Departments, The University of Electro-Communications, Chofu, Tokyo 182-8585, Japan; E-Mail:

关键词: ultralow power;    ultralow voltage;    CMOS;    minimum energy point;    variability;    back bias;    FDSOI;    silicon-on-thin-buried-oxide (SOTB);    thin BOX;   

DOI  :  10.3390/jlpea4020065

来源: mdpi

【 摘 要 】

Ultralow-voltage (ULV) CMOS will be a core building block of highly energy efficient electronics. Although the operation at the minimum energy point (MEP) is effective for ULP CMOS circuits, its slow operation speed often means that it is not used in many applications. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for the ultralow-power (ULP) electronics because of its small variability and back-bias control. Proper power and performance optimization with adaptive V_th control taking advantage of SOTB’s features can achieve the ULP operation with acceptably high speed and low leakage. This paper describes our results on the ULV operation of logic circuits (CPU, SRAM, ring oscillator and other logic circuits) and shows that the operation speed is now sufficiently high for many ULP applications. The “Perpetuum-Mobile” micro-controllers operating down to 0.4 V or lower are expected to be implemented in a huge number of electronic devices in the internet-of-things (IoT) era.

【 授权许可】

CC BY   
© 2014 by the authors; licensee MDPI, Basel, Switzerland.