IEICE Electronics Express | |
Design and FPGA implementation of digital pulse compression for HF chirp radar based on modified orthogonal transformation | |
Huotao Gao1  Jie Shi1  Yuxiang Sun1  Lin Zhou1  Qingchen Zhou1  Fan Wang1  | |
[1] Electronic Information Department, Wuhan University | |
关键词: digital pulse compression; orthogonal transformation; all-digital receiver; digital down converter; field programmable gates array; | |
DOI : 10.1587/elex.8.1736 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(10)Cited-By(3)The paper presents a digital pulse compression approach for high frequency (HF) chirp radar. The emphasis is to accomplish echo signal de-chirp operation by modified orthogonal transformation on field programmable gates array (FPGA) chip. This approach has been developed for an all-digital receiver platform which is directly radio frequency (RF) band-pass sampling, compared with the traditional analog receiver or intermediate frequency (IF) receiver, it has an easy hardware structure closing to a “soft” radar mode. The system closed-loop test shows the correctness and rationality of the design, meeting the demand of engineering application.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300900527ZK.pdf | 265KB | download |