CMOS implementation of a new high speed 5-2 compressor for parallel accumulations

IEICE Electronics Express

Abdollah Khoei¹  Mohammad Tohidi¹  Alireza Abolhasani¹  Khayrollah Hadidi¹ 

[1] Microelectronic Research Laboratory, University of Urmia

关键词: 5-2 compressors;    high speed;    pass transistor logic;   

DOI  :  10.1587/elex.10.20130364

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(9)This paper presents a new high speed 5-2 compressor. It is designed based on a new truth table which leads to a simple structure. Also, the driving problems are reduced. Due to the similar paths from inputs to the outputs, there will be no need for extra buffers in low latency paths to equalize the delays and the power dissipation is decreased. Furthermore, by use of full swing logics, the speed of cascaded operations is enhanced. The latency of proposed design is 440ps.

【 授权许可】

Unknown