IEICE Electronics Express | |
An accurate track-and-latch comparator | |
K. D. Sadeghipour1  | |
[1] University of Tabriz | |
关键词: latch comparator; offset cancellation; low offset; negative resistance; high speed; | |
DOI : 10.1587/elex.9.808 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(6)In this paper, a new accurate track and latch comparator circuit is presented. The Offset voltage of latch is compensated by negative feedback loop and the low offset voltage is achieved without pre-amplifiers. The pull up devices in modified regeneration latch is turned off to reduce quiescent current of comparator within the tracking phase. The Monte-Carlo simulation results for the designed comparator in 0.18µm CMOS process show that equivalent input referred offset voltage is 200µV at 1 sigma while it was 26mV at 1 sigma before offset cancellation. The comparator dissipates 400µW from a 1.8V supply while operates in 500MHz clock frequency. The power consumption improvement is up to 33% over previously reported structure.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300701829ZK.pdf | 444KB | download |