| IEICE Electronics Express | |
| A mixed sample-time error calibration technique in time-interleaved ADCs | |
| Chixiao Chen1  Fan Ye1  Junyan Ren1  Bei Yu1  | |
| [1] State Key Lab of ASIC and System, Fudan University | |
| 关键词: sample-time error; analog-to-digital converter; calibration; time-interleaved; | |
| DOI : 10.1587/elex.10.20130882 | |
| 学科分类:电子、光学、磁材料 | |
| 来源: Denshi Jouhou Tsuushin Gakkai | |
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【 摘 要 】
References(9)Cited-By(2)Sample-time error between channels degrades resolution of time-interleaved analog-to-digital converters (TIADCs). A calibration method implemented in mixed circuits with low-complexity and fast-convergence is proposed in this paper. The algorithm for detecting sample-time error, which is widely applied to wide-sense stationary input signals, is based on correlation. The detected sample-time error is corrected by a voltage-controlled sampling switch. Experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise-and-distortion ratio improves 19.1dB, and the spurious-free dynamic range improves 34.6dB for a 70.12-MHz input after calibration. The convergence time of the calibration is about 20000 sampling intervals.
【 授权许可】
Unknown
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO201911300813406ZK.pdf | 2485KB |
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