FIT: Fast Irregular Topology generation algorithm for application specific NoCs

IEICE Electronics Express

Suleyman Tosun¹ 

[1] Computer Engineering Department, Ankara University

关键词: Network-on-Chip;    topology generation;    energy;   

DOI  :  10.1587/elex.7.1132

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(4)Cited-By(1)This work presents a low complexity irregular topology generation algorithm for Netwok-on-Chip (NoC) design flow. The objective of the algorithm is minimizing the energy consumption of the final design. We tested the effectiveness of our algorithm by comparing it with its earlier counterparts on several multimedia applications.

【 授权许可】

Unknown