An effective rasterization architecture for mobile vector graphics processors

IEICE Electronics Express

Jinhong Park²  Youngsik Kim³  Tack-Don Han²  Chelho Jeong⁴  Jinwoo Kim²  Woo-Chan Park¹ 

[1] Dept. of Computer Engineering, Sejong University;Dept. of Computer Science, Yonsei University;Dept. of Game & Multimedia Engineering, Korea Polytechnic University;mGine Corporation

关键词: openVG;    vector graphics;    rasterization;    hardware accelerator;   

DOI  :  10.1587/elex.8.835

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(5)This paper proposed a novel index board rasterization architecture which reduces mathematical calculations and memory traffic for vector graphics. The proposed architecture uses the cell based method which has advantages in computational complexity, and generates the active span by referring to only valid cells and placing them in scanline order with two internal SRAMs. The proposed architecture reduces the amount of calculation by an average of 59.4% and also the external memory traffic by an average of 30.0% compared to the traditional architecture.

【 授权许可】

Unknown