Design of co-processor for real-time HMM-based text-to-speech on hardware system applied to Vietnamese

IEICE Electronics Express

Trong-Tu Bui¹  Cong-Kha Pham²  Huu-Thuan Huynh¹  Hieu-Binh Nguyen¹  Hong-Kiet Su¹  Duc-Hung Le¹  Trong-Thuc Hoang¹ 

[1] Faculty of Electronics and Telecommunications, The University of Science, VNU-HCM;University of Electro-Communications

关键词: text-to-speech;    TTS;    FPGA;    real-time;    co-processor;    Hidden Markov Model;    Vietnamese;   

DOI  :  10.1587/elex.12.20150448

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(16)Although HMM-based TTS has been studied for many years, there are some limitations such as real-time applications based on low-performance and low cost systems. In this paper, we present a design of a TTS co-processor used for HMM-based Text-to-Speech (TTS) hardware systems. Based on a dedicated FPU and resource sharing architecture, the co-processor can compute a lot of DSP algorithms required by HMM at very high speed. The system has been built and verified on the FPGA system with English and Vietnamese languages. The results show that it can compute up to 3 words per second at frequency of 100 MHz with the resources cost about 32,000 logic elements, 19,000 registers, and 957 KB memory.

【 授权许可】

Unknown