Area-delay efficient arithmetic Mixed-Radix Conversion for Fermat moduli

IEICE Electronics Express

Anne B. O'Donnell¹  Seamas McGettrick¹  Chris J. Bleakley¹ 

[1] School of Computer Science and Informatics, University College Dublin

关键词: Fermat numbers;    Mixed-Radix Conversion;    error detection;   

DOI  :  10.1587/elex.8.1040

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(9)Mixed Radix Conversion is an essential feature of error detection and correction in Redundant Residue Number Systems. Fermat numbers are a popular choice as moduli in these systems. However, Fermat numbers are typically implemented using Diminished-1 arithmetic which necessitates special consideration of zero in arithmetic operations. Furthermore, the sequential nature of Mixed Radix Conversion leaves it prone to considerable delay due to carry propagation in adders at each stage. In this paper, Diminished-1 arithmetic in carry save form is used to give significant reductions in area and delay compared to previously proposed hardware architectures. The percentage area reduction was found to range from 13% to 41% and that of delay from 19% to 49% for bit widths from 8 to 28bits.

【 授权许可】

Unknown