New systolic modular multiplication architecture for efficient Montgomery multiplication

IEICE Electronics Express

Se-Hyu Choi¹  Keon-Jik Lee¹ 

[1] School of Architectural, Civil, Environmental and Energy Engineering, Kyungpook National University

关键词: Montgomery;    modular multiplication;    systolic array;   

DOI  :  10.1587/elex.11.20141051

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)We propose a new low complexity Montgomery algorithm enabling the efficient selection of the quotient value necessary for an exact division in Montgomery multiplication. We also present two new systolic multipliers which use similar data flows as described in the most significant bit (MSB)-first GF(2m) multiplier in [1]. The proposed parallel and serial multipliers have less hardware and time complexities compared to related multiplier. The serial multiplier can be well applied to space-limited hardware. Furthermore, our proposed systolic multipliers include regularity, modularity, local interconnection, and unidirectional data flow features.

【 授权许可】

Unknown