Improved IDDQ design-for-testability technique to detect CMOS stuck-open faults

IEICE Electronics Express

Afzel Noore¹ 

[1] Lane Department of Computer Science and Electrical Engineering

关键词: stuck-open faults;    IDDQ testing;   

DOI  :  10.1587/elex.4.94

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(10)This paper presents a novel design-for-testability technique to reliably detect stuck-open faults in CMOS complex gates. The modified design uses an additional pair of transistors to establish a constant saturation current IDDQ through the transistors under test. Variations in current level are monitored using a built-in current sensor to detect the presence of stuck-open faults. Circuit simulations verify that the proposed design is also resilient to time skews caused by unequal delays in circuit paths.

【 授权许可】

Unknown