| IEICE Electronics Express | |
| Access time measurement of 64-kb Josephson-CMOS hybrid memories using SFQ time-to-digital converter | |
| Yuki Yamanashi1  Hyunjoo Jin1  Kenta Yaguchi1  Yuji Okamoto1  Nobuyuki Yoshikawa1  | |
| [1] Department of Electrical and Computer Engineering, Yokohama National University | |
| 关键词: superconducting integrated circuits; SFQ circuits; hybrid memory; access time; | |
| DOI : 10.1587/elex.7.320 | |
| 学科分类:电子、光学、磁材料 | |
| 来源: Denshi Jouhou Tsuushin Gakkai | |
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【 摘 要 】
References(7)We have been developing a Josephson/CMOS hybrid memory, which enables sub-nanosecond access time, in order to overcome a memory bottleneck in single-flux-quantum (SFQ) digital systems. In our previous study, we obtained the access time of about 1.2ns in a 16-kb hybrid memory system using a 0.35µm CMOS process, but observed unexpected double peaks in histograms of access-time measurements. In this study, we designed a 64-kb hybrid memory system using a 0.18µm CMOS process. We considered that the double peak effect is due to parasitic capacitances at the bonding pad of Josephson and CMOS chips and reduced them in the new design. Measured access time is about 1.4ns, which agrees well with simulation results. The double peaks in the histogram were completely removed in the new results.
【 授权许可】
Unknown
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO201911300342763ZK.pdf | 265KB |
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