MH4 : multiple-supply-voltages aware high-level synthesis for high-integrated and high-frequency circuits for HDR architectures

IEICE Electronics Express

Masao Yanagisawa²  Shin-ya Abe³  Youhua Shi¹  Nozomu Togawa³ 

[1] Waseda Institute for Advanced Study, Waseda University;Dept. of Electronic and Photonic Systems, Waseda University;Dept. of Computer Science and Engineering, Waseda University

关键词: high-level synthesis;    energy-optimization;    interconnection delay;    multiple supply voltages;    distributed-register architecture;   

DOI  :  10.1587/elex.9.1414

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(12)Cited-By(5)In this paper, we propose multiple-supply-voltages aware high-level synthesis algorithm for HDR architectures which realizes high-speed and high-efficient circuits. We propose three new techniques: virtual area estimation, virtual area adaptation, and floor-planning-directed huddling, and integrate them into our HDR architecture synthesis algorithm. Virtual area estimation/adaptation effectively estimates a huddle area by gradually reducing it during iterations, which improves the convergence of our algorithm. Floorplanning-directed huddling determines huddle composition very effectively by performing floorplanning and functional unit assignment inside huddles simultaneously. Experimental results show that our algorithm achieves about 29% run-time-saving compared with the conventional algorithms, and obtains a solution which cannot be obtained by our original algorithm even if a very tight clock constraint is given.

【 授权许可】

Unknown