IEICE Electronics Express | |
Reduction of signal reflection in high-frequency three-dimensional (3D) integration circuits | |
Zhangming Zhu1  Xiaoxian Liu1  Ruixue Ding1  Fengjuan Wang1  Yintang Yang1  | |
[1] School of Microelectronics, Xidian University | |
关键词: three-dimensional (3D) integrated circuit (IC); through silicon via (TSV); TSV channel; signal reflection; S-parameters; | |
DOI : 10.1587/elex.10.20130449 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(3)Cited-By(3)The through silicon via (TSV) technology provides a promising option to realize three dimensional (3D) gigscale systems with high performance. As the fundamental elements in this system, Redistribution Layers (RDLs), TSVs, and bumps, which constitute a TSV channel together, transmit high speed signals. Consequently the impedance mismatch among these elements causes signal reflection along the channel that need to be investigated. Chebyshev Multisection Matching Transformers are proposed to reduce the signal reflection of the TSV channel when operating frequency up to 20GHz, by utilizing of which S11 and S21 has been improved of 150% and 73.3%, respectively.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300326741ZK.pdf | 1535KB | download |