VLSI design of a reconfigurable S-box based on memory sharing method

IEICE Electronics Express

Peng Cao²  Xingyuan Fu²  Xiao Zhang¹  Weiwei Shan² 

[1] Shanghai Information Security Testing Evaluation and Certification Center;National ASIC System Engineering Research Center, Southeast University

关键词: S-box;    cryptographic circuit;    memory sharing;    DES;    AES;   

DOI  :  10.1587/elex.10.20130872

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)Cited-By(1)S-box is a core component of many block cipher algorithms. A reconfigurable S-box based on look-up table (LUT) with memory-sharing is proposed in this paper. It uses a sharing memory to support different S-box operation modes (4 × 4, 6 × 4, and 8 × 8) for most of the block cipher algorithms as well as reduce memory size. It also supports high-speed pipeline structure of DES and Serpent. This new type of S-box is applied in a reconfigurable cryptographic coprocessor under 0.18μm CMOS process. It is also used in a DES circuit with 16 pipeline stages. Synthesis results show that it works at 100MHz frequency with flexibility of different modes and a reduced area compared to non-memory-sharing LUT method with equivalent sizes of different S-boxes.

【 授权许可】

Unknown