Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography| Science Publications

Journal of Computer Science

Hafiz M.H. Babu¹  Noor M. Nayeem¹  Lafifa Jamal¹ 

关键词: Montgomery multiplier;    carry save adder;    reversible gate;    shift register;   

DOI  :  10.3844/jcssp.2009.49.56

学科分类：计算机科学（综合）

来源: Science Publications

【 摘 要 】

Problem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA) usingModified TSG (MTSG) gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.

【 授权许可】

Unknown