Novel bootstrapped CMOS differential logic family for ultra-low voltage SoCs

IEICE Electronics Express

Jae-Hyuk Oh¹  Yong-Gu Kang¹  Byung-Hwa Jung¹  Jong-Woo Kim¹  Yoon-Suk Park¹  Bai-Sun Kong¹  Sung-Chan Kang¹  Yong-Ki Kim¹ 

[1] School of Information and Communication Engineering, Sungkyunkwan University

关键词: bootstrapping;    low voltage;    low power;    CMOS logic family;   

DOI  :  10.1587/elex.5.711

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(5)This paper describes novel bootstrapped CMOS logic family operating at ultra-low supply voltages. The proposed logic family provides better switching performance than conventional bootstrapped logic family by isolating the bootstrapping circuit from timing-critical signal paths. The logic family also minimizes area overhead due to the bootstrapping circuit by adapting a differential structure having a single bootstrap capacitor shared between complementary outputs. Multi-input XOR/XNOR gates and 64-bit adders were designed in 0.18um CMOS process as test vehicles for assessing the performance. Comparison results indicate that the power-delay product of the proposed logic family is improved by up to 67% compared to conventional differential logic circuits at the supply voltage ranging from 0.5V to 0.8V.

【 授权许可】

Unknown