Comparison of single-event transients of T-gate core and IO device in 130 nm partially depleted silicon-on-insulator technology

IEICE Electronics Express

Chen Zhuojun¹  Wang Zheng¹  Lin Min¹  Zou Shichang¹  Zheng Yunlong¹  Sun Shulong¹  Dai Ruofan¹  Sang Zehua¹ 

[1] The State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences

关键词: direct measurement;    heavy ion irradiation;    silicon on insulator technology;    single event transient;    MOSFET;    radiation harden by design;   

DOI  :  10.1587/elex.13.20160424

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(12)Many papers have confirmed that the single event vulnerability of semiconductor devices significantly increase with power supply voltage drop, rendering considerable challenges for the radiation harden design as per the development of Moore’s law. The higher the supply voltage of the chip scaling down, the greater severity of these problems. In this article, SET pulse widths induced by heavy ion of T-gate 1.2 V Core and 3.3 V IO devices fabricated by a 130 nm partially depleted silicon-on-insulator technology were directly measured. We discovered that, by adjusting the design parameters and choosing an appropriate device W/L ratio, different power supply voltage SOI devices are able to achieve the same sensitivity for the single event, irrespective of supply voltage. The distribution of SET-pulse widths ranges from 210 to 735 ps under a constant LET of 37.6 MeV-cm2/mg, and the single event transient vulnerability of T-gate 1.2 V Core and 3.3 V IO devices is similar, which is instructive for the low-voltage and low-power circuit application.

【 授权许可】

Unknown