IEICE Electronics Express | |
Coarse-grained reconfigurable architecture with hierarchical context cache structure and management approach | |
Chao Wang1  Peng Cao1  Jun Yang1  Bo Liu1  | |
[1] National ASIC System Engineering Research Center, Southeast University | |
关键词: coarse-grained reconfigurable architecture; context cache structure; context management mechanism; | |
DOI : 10.1587/elex.14.20170090 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
This paper proposes a novel coarse-grained reconfigurable array (CGRA) with hierarchical context cache structure and efficient cache management approaches, including time-frequency weighted (TFW) context cache replacement strategy and context multi-casting (CMC) mechanism. By fully exploiting inherent configuration features, the configuration performance is improved by 18.2% with half context memory cost. Our CGRA was implemented under the process of TSMC 65 nm, which can work at the frequency of 200 MHz with the area of 23.2 mm2. Compared to the previous CGRAs, our work has the advantage of 3.8â¼12Ã performance improvement and 2.3â¼15.7Ã energy efficiency increase.
【 授权许可】
CC BY
【 预 览 】
Files | Size | Format | View |
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RO201902193093784ZK.pdf | 1640KB | download |