期刊论文详细信息
IEICE Electronics Express
BARR: Congestion aware scheduling algorithm for Network-on-Chip router
Xiaoshan Yu1  Jiayi Chen2  Kun Wang2  Yantao Guo3  Nan Su3  Huaxi Gu3 
[1] School of Computer Science and Technology, Xidian University;Science and Technology on Information Transmission and Dissemination in Communication Networks Laboratory;State Key Laboratory of Integrated Service Networks, Xidian University
关键词: Network-on-chip;    router;    scheduling algorithm;    round-robin;   
DOI  :  10.1587/elex.14.20161247
学科分类:电子、光学、磁材料
来源: Denshi Jouhou Tsuushin Gakkai
PDF
【 摘 要 】

Scheduling algorithm is crucial to the performance of the Network-on-chip router. Different from traditional scheduling algorithms that concentrate on local fairness, we propose a congestion-aware scheduling algorithm based on input buffer of downstream router. The scheduling algorithm keeps a match dynamically between input and output by detecting the flits number to be transferred in the same packet. It can reduce network congestion especially under heavy traffic loads. Compared to RRM and iSLIP algorithm, the new scheduling algorithm can increase the saturation throughput by 8.2% and reduce the average communication latency by 7.8% under non-uniform traffic.

【 授权许可】

CC BY   

【 预 览 】
附件列表
Files Size Format View
RO201902192527389ZK.pdf 1804KB PDF download
  文献评价指标  
  下载次数:10次 浏览次数:15次