Effects of Interfacial Dielectric Layers on the Electrical Performance of Top-Gate In-Ga-Zn-Oxide Thin-Film Transistors

ETRI Journal

关键词: thin-film transistor;    electrical stability;    interfacial dielectric layer;    IGZO;   

Others  :  1185737
DOI  :  10.4218/etrij.09.1209.0049

【 摘 要 】

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below 200°C, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as Si₃N₄ and Al₂O₃, the electrical properties are analyzed. After post-annealing at 200°C for 1 hour in an O₂ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a Si₃N₄ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests ofI_d = 3µA, an IGZO-TFT with heat-treated Si₃N₄ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

   

【 参考文献 】

• [1]H. Yabuta et al., "High-Mobility Thin-Film Transistor with Amorphous InGaZnO4 Channel Fabricated by Room Temperature RF-Magnetron Sputtering," Appl. Phys. Lett., vol. 89, no. 11, 2006, pp. 112123(1-3).
• [2]K. Nomura et al., "Room-Temperature Fabrication of Transparent Flexible Thin-Film Transistors Using Amorphous Oxide Semiconductors," Nature, vol. 432, no. 25, 2004, pp. 488-491.
• [3]H.N. Lee et al., "3.5 Inch QCIF + AM-OLED Panel Based on Oxide TFT Backplane," Tech. Dig. SID, California, USA, 2007, pp. 1826-1829.
• [4]T. Kamiya and M. Kawasaki, "ZnO-Based Semiconductors as Building Blocks for Active Devices," MRS Bulletin, vol. 33, 2008, pp. 1061-1066.
• [5]J.F. Wager, D.A. Keszler, and R.E. Presley, Transparent Electronics, New York: Springer, 2008.
• [6]S. Chang et al., "Efficient Suppression of Charge Trapping in ZnO-Based Transparent Thin Film Transistors with Novel Al2O3/HfO2/Al2O3 Structure," Appl. Phys. Lett., vol. 92, 2008, pp. 192104(1-3).
• [7]J.S. Park et al., "Impact of High-k TiOx Dielectric on Device Performance of Indium-Gallium-Zinc Oxide Transistors," Appl. Phys. Lett., vol. 94, 2009, pp. 042105(1-3).
• [8]A. Suresh et al., "Room Temperature Pulsed Laser Deposited Indium Gallium Zinc Oxide Channel Based Transparent Thin Film Transistors," Appl. Phys. Lett., vol. 90, 2007, pp. 123512 (1-3).
• [9]J.M. Lee et al., "Low-Frequency Noise in Amorphous Indium-Gallium-Zinc-Oxide Thin-Film Transistors," IEEE Electron Device Lett., vol. 30, 2009, pp. 505-507.
• [10]J.K. Jeong et al., "Origin of Threshold Voltage Instability in Indium-Gallium-Zinc Oxide Thin Film Transistors," Appl. Phys. Lett., vol. 93, 2008, pp. 123508 (1-3).
• [11]W.S. Cheong et al., "Process Development of ITO Source/Drain for the Top-Gate Indium-Gallium-Zinc Oxide Transparent Thin-Film Transistor," Thin Solid Films, vol. 517, 2009, pp. 4094-4099.
• [12]W.S. Cheong et al., "Optimization of an Amorphous In-Ga-Zn-Oxide Semiconductor for a Top-Gate Transparent Thin Film Transistor," J. Korean Phys. Soc., vol. 54, no. 5, 2009, pp. 1879-1884.
• [13]W. Lim et al., "Interface Dependent Electrical Properties of Amorphous InGaZnO4 TFTs," J. Vac. Sci. Technol. B, vol. 27, 2009, pp. 126-129.
• [14]J.K. Jeong et al., "High Performance Thin Film Transistors with Cosputtered Amorphous Indium Gallium Zinc Oxide Channel," Appl. Phys. Lett., vol. 91, 2007, pp. 113505 (1-3).
• [15]J.H. Shin et al., "Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors," ETRI Journal, vol. 31, no. 1, 2009, pp. 62-64.