Fast NAND Flash Memory System for Instruction Code Execution

ETRI Journal

关键词: embedded applications;    buffer system;    instruction characteristics;    NAND flash memory;   

Others  :  1186311
DOI  :  10.4218/etrij.12.0211.0472

【 摘 要 】

The objective of this research is to design a high-performance NAND flash memory system containing a buffer system. The proposed instruction buffer in the NAND flash memory consists of two parts, that is, a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. A spatial buffer with a large fetching size turns out to be effective for serial instructions, and a temporal buffer with a small fetching size is devised for branch instructions. Simulation shows that the average memory access time of the proposed system is better than that of other buffer systems with four times more space. The average miss ratio is improved by about 70% compared with that of other buffer systems.

   

【 参考文献 】

• [1]J. Park et al., “A Hybrid Flash Translation Layer for SLC-MLC Flash Memory Based Multibank Solid State Disk,” Microprocessors Microsyst., vol. 35, no. 1, Feb. 2011, pp. 48-59.
• [2]Wikipedia, “Flash memory 2010.” http://en.wikipedia.org/wiki/ Flash_memory
• [3]Samsung Elec., NAND Flash Memory & Smart Media Data Book, 2010.
• [4]B. Jung and J. Lee, “Flash Memory System with Spatial Smart Buffer for the Substitution of a Hard-Disk,” J. Korea Soc. Computer Inf., vol. 14, no. 3, Mar. 2009, pp. 41-49.
• [5]W. Huang et al., “Energy-Efficient Buffer Architecture of Flash Memory,” Proc. Multimedia Ubiquitous Engineering, 2008, pp. 543-546.
• [6]C. Park et al., “A Low-Cost Memory Architecture with NAND XIP for Mobile Embedded Systems,” Proc. CODES-ISSS, 2003, pp.138-143.
• [7]G. Park et al., “A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache,” IEICE Trans. Fundamentals Electron., Commun., Computer Sci., vol. E92-C, no. 4, Apr. 2009, pp. 517-521.
• [8]J. Rucker, MediaBench II: A Tool for Evaluating Multimedia Workloads on Embedded Systems Mediabench, University of California, Los Angeles, CA, USA, 2001. http://euler.slu.edu/~fritts/mediabench/
• [9]Simplescalar. http://www.simplescalar.com