Low Voltage CMOS LC VCO with Switched Self-Biasing

ETRI Journal

关键词: CMOS;    VCO;    tail current-shaping;    amplitude control;    1/f noise;    Switched biasing;   

Others  :  1185750
DOI  :  10.4218/etrij.09.1209.0046

【 摘 要 】

This paper presents a switched self-biasing and a tail current-shaping technique to suppress the 1/f noise from a tail current source in differential cross-coupled inductance-capacitance (LC) voltage-controlled oscillators (VCOs). The proposed LC VCO has an amplitude control characteristic due to the creation of negative feedback for the oscillation waveform amplitude. It is fabricated using a 0.13 μm CMOS process. The measured phase noise is-117 dBc/Hz at a 1 MHz offset from a 4.85 GHz carrier frequency, while it draws 6.5 mA from a 0.6 V supply voltage. For frequency tuning, process variation, and temperature change, the amplitude change rate of the oscillation waveform in the proposed VCO is 2.1 to 3.2 times smaller than that of an existing VCO with a fixed bias. The measured amplitude change rate of the oscillation waveform for frequency tuning from 4.55 GHz to 5.04 GHz is 131 pV/Hz.

   

【 参考文献 】

• [1]A. Hajimiri and T.H. Lee, "Design Issues in CMOS Differential LC Oscillators," IEEE J. Solid-State Circuits, vol. 34, May 1999, pp. 717-724.
• [2]E. Hegazi, H. Sjőland, and A.A. Abidi, "A Filtering Technique to Lower LC Oscillator Phase Noise," IEEE J. Solid-State Circuits, vol. 36, Dec. 2001, pp. 1921-1930.
• [3]B. Soltanian and P. Kinget, "Tail Current-Shaping to Improve Phase Noise in LC Voltage-Controlled Oscillators," IEEE J. Solid-State Circuits, vol. 41, Aug. 2006, pp. 1792-1802.
• [4]B.D. Muer et al., "A 2-GHz Low-Phase-Noise Integrated LC VCO Set with Flicker-Noise Up-Conversion Minimization," IEEE J. Solid-State Circuits, vol. 35, July 2000, pp. 1034-1038.
• [5]Y. Ku et al., "Close-In Phase-Noise Enhanced Voltage-Controlled Oscillator Employing Parasitic V-NPN Transistor in CMOS Process," IEEE J. Trans. Microwave Theory and Technique, vol. 54, Apr. 2006, pp. 1363-1369.
• [6]I. Bloom and Y. Nemirovsky, "1/f Noise Reduction of Metal-Oxide-Semiconductor Transistors by Cycling from Inversion to Accumulation," Appl. Phys. Lett., vol. 58, Apr. 1991, pp. 1664-1666.
• [7]B. Dierickx and E. Simoen, "The Decrease of ‘Random Telegraph Signal’ Noise in Metal-Oxide-Semiconductor Field-Effect Transistors When Cycled from Inversion to Accumulation," J. Appl. Phys., vol. 71, Feb. 1992, pp. 2028-2029.
• [8]A.P. van der Wel et al., "MOSFET 1/f Noise Measurement under Switched Bias Conditions," IEEE Electron Device Letters, vol. 21, Jan. 2000, pp. 43-46.
• [9]Z. Zhang and J. Lau, "Experimental Study on MOSFET’s Flicker Noise under Switching Conditions and Modeling in RF Applications," Proc. IEEE Custom Integrated Circuits Conf., 2001, pp. 393-396.
• [10]E.A.M. Klumperink et al., "Reducing MOSFET 1/f Noise and Power Consumption by Switched Biasing," IEEE J. Solid-State Circuits, vol. 35, July 2000, pp. 994-1001.
• [11]S.L.J. Gierkink et al., "Intrinsic 1/f Device Noise Reduction and Its Effect on Phase Noise in CMOS Ring Oscillators," IEEE J. Solid-State Circuits, vol. 34, July 1999, pp. 1022-1025.
• [12]C.C. Boon et al., "RF CMOS Low-Phase-Noise LC Oscillator through Memory Reduction Tail Transistor," IEEE J. Trans. Circuits and Systems-II: Express Brief, vol. 51, Feb. 2004, pp. 85-90.
• [13]D. Park and S. Cho, "A Power-Optimized CMOS LC VCO with Wide Tuning Range in 0.5 V Supply," Proc. ISCAS, 2006, pp. 3233-3236.
• [14]N. Fong et al., "Design of Wide-Band CMOS VCO for Multiband Wireless LAN Applications," IEEE J. Solid-State Circuits, vol. 38, Aug. 2003, pp. 1333-1342.
• [15]Ja-Yol Lee et al., "Fully Differential 5-GHz LC-Tank VCOs with Improved Phase Noise and Wide Turning Range," ETRI Journal, vol. 27, no. 5, 2005, pp. 473-483.