会议论文详细信息
10th Asia Plasma and Fusion Association Conference
Development of control system for multi-converter High voltage Power supply using programmable SoC
Dave, Rasesh^1 ; Dharangutti, Jagruti^2 ; Singh, N.P.^1 ; Thakar, Aruna^1 ; Dhola, Hitesh^1 ; Gajjar, Sandip^1 ; Parmar, Darshan^1 ; Zaveri, Tanish^2 ; Baruah, Ujjwal^1
ITER-India, Institute for Plasma Research, Bhat, Gandhinagar, Gujarat
382 428, India^1
Institute for Technology, Nirma University, S G Highway, Ahmedabad, Gujarat
382 481, India^2
关键词: All Programmable SoC;    Closed-loop control;    Deterministic functions;    External environments;    High voltage power supply;    Parallel processing;    Real time performance;    System capabilities;   
Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/823/1/012035/pdf
DOI  :  10.1088/1742-6596/823/1/012035
来源: IOP
PDF
【 摘 要 】

Multi-converter based High Voltage Power Supplies (HVPSs) find application in multi-megawatt accelerators, RF systems. Control system for HVPS must be a combination of superior parallel processing, real time performance, fast computation and versatile connectivity. The hardware platform is expected to be robust, easily scalable for future developments with minimal overheads. This paper describes development of control system on Zynq All Programmable SoC (System on Chip) for HVPS. Typical HVPS control mechanism involves communication, generation of precise control signals/pulses for few hundred numbers of chopper and closed loop control in microsecond range for regulated output. Such kind of requirements can be met with Zynq All Programmable SoC, which is a combination of Dual core ARM Cortex A-9 Processing System (PS) and Xilinx 7 series FPGA based Programmable Logic (PL). Deterministic functions of power supply control system such as generation of control signals with precise inter-channel delay of nanosecond range and communication with individual chopper at 100kbps can be implemented on PL. PS should implement corrective tasks based on field feedback received from individual chopper, user interface and OS management that allows to take full advantage of system capabilities. PS and PL are connected with on-chip AXI-4 interface with low latency and higher bandwidth through 9 AXI ports. Typically PS boots first, this ensures secure booting and prevents external environment from tampering PL.

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