会议论文详细信息
27th IUPAP Conference on Computational Physics
A Framework to Simulate Semiconductor Devices Using Parallel Computer Architecture
物理学;计算机科学
Kumar, Gaurav^1 ; Singh, Mandeep^1 ; Bulusu, Anand^2 ; Trivedi, Gaurav^1
Dept. of EEE, Indian Institute of Technology Guwahati, Assam
781039, India^1
Dept. of ECE, Indian Institute of Technology Roorkee, Uttarakhand
247667, India^2
关键词: Discontinuous Galerkin finite-element method;    Discontinuous Galerkin methods;    Narrow-width effects;    Parallel computer architecture;    Parallel computing platform;    Semiconductor technology;    Short-channel effect;    Simulation environment;   
Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/759/1/012098/pdf
DOI  :  10.1088/1742-6596/759/1/012098
学科分类:计算机科学(综合)
来源: IOP
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【 摘 要 】

Device simulations have become an integral part of semiconductor technology to address many issues (short channel effects, narrow width effects, hot-electron effect) as it goes into nano regime, helping us to continue further with the Moore's Law. TCAD provides a simulation environment to design and develop novel devices, thus a leap forward to study their electrical behaviour in advance. In this paper, a parallel 2D simulator for semiconductor devices using Discontinuous Galerkin Finite Element Method (DG-FEM) is presented. Discontinuous Galerkin (DG) method is used to discretize essential device equations and later these equations are analyzed by using a suitable methodology to find the solution. DG method is characterized to provide more accurate solution as it efficiently conserve the flux and easily handles complex geometries. OpenMP is used to parallelize solution of device equations on manycore processors and a speed of 1.4x is achieved during assembly process of discretization. This study is important for more accurate analysis of novel devices (such as FinFET, GAAFET etc.) on a parallel computing platform and will help us to develop a parallel device simulator which will be able to address this issue efficiently. A case study of PN junction diode is presented to show the effectiveness of proposed approach.

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