Charging/discharging processes in nanocrystaline MOS structures - Theoretical study

International Conference on Microtechnology and Thermal Problems in Electronics 2015; International Conference on Smart Engineering of New Materials 2015

Tanous, D.^1 ; Mazurak, A.^1 ; Majkusiak, B.^1

Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, Warsaw, Poland^1

关键词: Capacitance voltage characteristic;    Charging/discharging;    Current voltage;    Developed model;    Discharging process;    Insulator layer;    Metal insulator semiconductor structures;    Theoretical study;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/709/1/012012/pdf
DOI  :  10.1088/1742-6596/709/1/012012

来源: IOP

【 摘 要 】

We present the study of impact of some parameters of the metal-insulator-semiconductor structure with nanocrystals embedded in the insulator layer on the current-voltage and capacitance-voltage characteristics with the bias voltage ramp rate as a parameter. The developed model is used as a tool for theoretical understanding the physics behind charging and discharging processes in the considered structures.