The Study on the Key Hardware Development of Single-Phase Photovoltaic Grid-Connected Inverters

2019 3rd International Workshop on Renewable Energy and Development

能源学;生态环境科学

Ma, Lei^1 ; Sun, Jian^2 ; Yang, Xiaomei^3 ; Sang, Bingyu^4 ; Lin, Yandan^1

Department of Illuminating Engineering and Light Sources, Fudan University, Shanghai

200433, China^1

Faculty of Engineering and Information Technologies, University of Sydney, NSW

2006, Australia^2

State Grid Jiangsu Electric Power Co., Ltd., No.215, Shanghai Road, Nanjing

211106, China^3

Nanjing Branch of China Electric Power Research Institute, Jiangsu Province, Nanjing

210003, China^4

关键词: Hardware design;    Hardware development;    High-efficiency;    Inverter topologies;    Lower power devices;    Maximum Efficiency;    Photovoltaic grids;    Power device loss;   

Others  :  https://iopscience.iop.org/article/10.1088/1755-1315/267/4/042043/pdf
DOI  :  10.1088/1755-1315/267/4/042043

学科分类：环境科学（综合）

来源: IOP

【 摘 要 】

High-efficiency inverter topology design on single-phase photovoltaic grid-connected equipment is the core of bringing considerable benefits to the society and the investors. In order to study the key hardware design of the inverter that meets the leakage current requirement and achieve the maximum efficiency, this paper analyses the H-bridge based topology (H5 and H6) and DPB topology. Firstly, this paper discusses the working principle of these topologies and concludes that the DPB topology involves fewer MOSFETs than the H-bridge based topology. Additional studies of power device analysis and other component losses in these topologies have concluded that DPB topology typically has lower power device losses at different load ratios. For instance, when the load ratio (Po / Pe) is 100, the power device loss of the H5 topology is 77 W, and the loss of the H6 topology is 68.7 W. Under the same conditions, the loss of the power device in the DPB topology is only 53.6 W.