2D-CWT IP core design and implementation for fringe pattern analysis

2019 2nd International Conference on Advanced Materials, Intelligent Manufacturing and Automation

Mao, Lulu^1 ; Ma, Jun^1^2 ; Chen, Hong^1 ; Ma, Yuanyuan^1 ; Chen, Shouhong^1^2 ; Xu, Cuifeng^1^2

School of Electronic Engineering and Automation, Guilin University of Electronic Technology, Guilin, GuangXi

541004, China^1

Guangxi Key Laboratory of Automatic Detecting Technology and Instruments, Guilin University of Electronic Technology, Guilin, GuangXi

541004, China^2

关键词: Acquisition modules;    Configuration modules;    Fringe pattern analysis;    Hardware-accelerated;    Phase distribution;    Phase extraction;    Real time analysis;    Two-dimensional continuous wavelet transforms;   

Others  :  https://iopscience.iop.org/article/10.1088/1757-899X/569/3/032071/pdf
DOI  :  10.1088/1757-899X/569/3/032071

来源: IOP

【 摘 要 】

In order to meet the demand of high-speed or real-time analysis for digital interferograms, an advanced hardware accelerated method based on the field programmable gate array (FPGA) is proposed by using the two-dimensional continuous wavelet transform (2D-CWT) technique. In this paper, a 2D-CWT IP core is designed and implemented. It consists of a digital interferograms acquisition module, an interferograms data buffer module, a configuration module, a 2D-CWT operation module, and an output module. When the mother wavelet is selected, e.g., the Morlet wavelet, and the scale factors and rotation angles are setting, the spectrums of fringe patterns are obtained in the 2D-CWT operation module and transferred to the computer through the output module for further processing. Then, the phase distribution of the interferogram is extracted by using the wavelet ridge detection algorithm. Real experiments results show that the 2D-CWT IP core analysis method can reduce the time of phase extraction, and verify the validity and effectiveness of the proposed method.