来源:Enabling Algorithms, Signal Processing, and Circuits for Agile Cognitive Radio in CMOS Technology , 18卷 , 2017
作者:Christian Venerus, Ian Galton.
使用许可:Others
2 A Linearized Model for the Design of Fractional-N PLLs based on Dual-Mode Ring Oscillator FDCs, [期刊论文]
来源:Enabling Algorithms, Signal Processing, and Circuits for Agile Cognitive Radio in CMOS Technology , 88卷 , 2017
作者:Colin Weltin-Wu, Eythan Familier, Ian Galton.
使用许可:Others
来源:Enabling Algorithms, Signal Processing, and Circuits for Agile Cognitive Radio in CMOS Technology , 26卷 , 2017
作者:C. Luo, P. S. Gudem, J. F Buckwalter.
使用许可:Others
来源:Enabling Algorithms, Signal Processing, and Circuits for Agile Cognitive Radio in CMOS Technology , 2017
作者:Cheng-kai Luo, Prasad S. Gudem, James F. Buckwalter.
使用许可:Others
来源:Advanced ACTPol , 1860卷 , 2017
作者:
使用许可:Others
来源:Advanced ACTPol , 122卷 , 2017
作者:
使用许可:Others