Parametervariations,noisesusceptibility, andincreasingenergy dissipationofCMOSdeviceshavebeenrecognized asmajor challenges incircuit and micro-architecture designin the nanometer regime. Among these, parametervariations andnoise susceptibilityareincreasingly causingCMOS devicesto behaveinan "unreliable" or"probabilistic" manner. To addressthesechallenges, a shift in design paradigm, from current day deterministic designsto"statistical" or"probabilistic"designs isdeemed inevitable. Motivated by these considerations, Iintroduce and define probabilistic Boolean logic, whose logical operators are by definition"correct" with a probability 1/2 <=p <= 1. While most of the laws ofconventional Booleanlogic can benaturally extendedto be validintheprobabilistic case,thereareafewsignificant departures.We also showthat computations realized using implicitly probabilistic Booleanoperators are more energyefficient than their counterparts which use explicitsources of randomness, in the contextof probabilistic Boolean circuits as well as probabilistic models with state, Rabin automata.To demonstratethe utilityof implicitly probabilisticelements, we studyafamilyofprobabilistic architectures:theprobabilisticsystem-on-a-chipPSOC,basedon CMOS devicesrendered probabilistic due to noise, referred to as probabilistic CMOS or PCMOS devices.Thesearchitectures yield significant improvements,bothintheenergy consumedaswellasinthe performance in the context of probabilistic or randomized applications withbroad utility.Finally, weextendthe considerationof probability ofcorrectness to arithmeticoperations, through probabilistic arithmetic.We showthat in the probabilistic context, substantial savingsin energy over correctarithmetic operations maybeachieved.Thisis thetheoretical basisof theenergy savings reported in the videodecoding and radar processing applications that has been demonstrated in prior work.
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Probabilistic boolean logic, arithmetic and architectures