Design, scaling and reliability of devices for high-performance mixed-signal applications

Silicon-germanium;Heterojunction bipolar transistor;TCAD;Scaling;Reliability;Device design;Mixed-signal;Simulation;High-frequency;Cryogenic temperature;Characterization

Chakraborty, Partha Sarathi ; Cressler, John D. Electrical and Computer Engineering Naeemi, Azad J. Vogel, Eric M. Mukhopadhyay, Saibal Davis, Jeffrey A. ; Cressler, John D.

University:Georgia Institute of Technology

Department:Electrical and Computer Engineering

关键词: Silicon-germanium;    Heterojunction bipolar transistor;    TCAD;    Scaling;    Reliability;    Device design;    Mixed-signal;    Simulation;    High-frequency;    Cryogenic temperature;    Characterization;   

Others  :  https://smartech.gatech.edu/bitstream/1853/58137/1/CHAKRABORTY-DISSERTATION-2015.pdf

美国|英语

来源: SMARTech Repository

【 摘 要 】

This research investigates and gains new understanding on how silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) device design couples with both performance scaling and reliability for mixed-signal applications (high-frequency and analog). In addition, this work provides methods of using this knowledge to enhance the predictive modeling of performance and reliability for these devices. The primary objective of this effort is to develop a predictive device modeling methodology and simulation framework that can be used to design new mixed-signal device technologies, and can then be used to assess the device performance and reliability concurrently. Ultimately, the goal is to highlight the need for device performance and reliability in a circuit environment, and establish best practices for practical modeling of these constraints and any resulting trade-offs. To support this objective, several specific areas were targeted to fill the existing gaps in knowledge. This includes developing a technology computer-aided-design (TCAD) based integrated simulation framework and methodology to study performance scaling and reliability in complementary SiGe HBTs; identifying factors determining the predictive nature of the simulated device figures-of-merit (FoM); studying electrothermal constraints for scaling SiGe HBTs on thick-film silicon-on-insulator (SOI) to understand its impact on the DC and RF safe-operating-area (SOA) for the device; and performing reliability studies of hot-carrier damage and annealing in npn and pnp SiGe HBT devices in an effort to gain insight into the physical mechanisms involved and to develop fundamental understanding to aid TCAD modeling of hot-carrier damage in these devices. All of these individual studies resulting from the main research tasks are harmoniously tied together by a central theme: to develop a fundamental understanding about how the device design factors influence both performance scaling and reliability. Some of the key existing challenges and knowledge gaps are addressed by analyzing and reconciling the experimental data with simulation results.