Tolerating asymmetric data races with minimal hardware support

computer architecture;software reliability;concurrency bugs

Qi, Shanxiang ; Torrellas ; Josep

关键词: computer architecture;    software reliability;    concurrency bugs;   

Others  :  https://www.ideals.illinois.edu/bitstream/handle/2142/15995/Qi_Shanxiang.pdf?sequence=1&isAllowed=y

美国|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Data races are a common type of concurrency bug in parallel programs. An important type of race thathas not received much attention is Asymmetric data races. In these races, the state of well tested, correctthreads is corrupted by racing threads from external, typically third-party code. Current schemes to detectand tolerate these races are software based, and have substantial execution overhead.This thesis proposes the first scheme to detect and tolerate asymmetric data races in hardware. Theapproach, called Pacman, induces negligible execution overhead and requires minimal hardware modifications.In addition, compared to past software-based schemes, Pacman eliminates deadlock cases. Pacman isbased on using hardware address signatures to detect the asymmetric races. Processor, cache coherence, andprotocol messages remain unchanged. We evaluate Pacman for all the SPLASH2 and PARSEC applications.Our results show that Pacman is effective and has minimal overhead.ii