Tutorial on designing and implementing a direct digital synthesizer (DDS) on afield programmable gate array (FPGA)

direct digital synthesis (DDS);direct digital synthesizer;direct digital synthesizer (DDS);Field-Programmable Gate Array (FPGA);circuit design;digital circuit design;design flow;design;Implementation;Verilog;tutorial;phase accumulator;sine lookup table;phase truncation;spurs;simulation;place and route;ModelSim;Xilinx;Virtex

Bhagat, Karan ; Schutt-Ainé ; José E.

关键词: direct digital synthesis (DDS);    direct digital synthesizer;    direct digital synthesizer (DDS);    Field-Programmable Gate Array (FPGA);    circuit design;    digital circuit design;    design flow;    design;    Implementation;    Verilog;    tutorial;    phase accumulator;    sine lookup table;    phase truncation;    spurs;    simulation;    place and route;    ModelSim;    Xilinx;    Virtex;   

Others  :  https://www.ideals.illinois.edu/bitstream/handle/2142/42300/Karan_Bhagat.pdf?sequence=1&isAllowed=y

美国|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Many telecommunication applications require a fast switching, fine tuning and superior quality sinusoidal signal source for their components. One such a frequency synthesizer is a direct digital synthesizer (DDS).This thesis work utilizes a design that aims to combine digital circuit design and electronic communication knowledge, and apply them in a practical environment. It does so by providing a tutorial on designing and implementing a DDS on an FPGA using Xilinx’s ISE software. The thesis also examines the final results and shows the unwanted spurs that are generated. Since this is purely a digital design, it does not implement a digital-to-analog converter (DAC) or a low-pass filter. Using a Virtex 6 design for the FPGA, one can achieve close to perfect sinusoids, without any phase change, with varying frequency tuning words (FTWs).