Simulation of IBIS models using HSpice and ADS

input/output buffer information specification (IBIS) Simulation

Win, Si ; Schutt-Ainé ; José E.

关键词: input/output buffer information specification (IBIS) Simulation;   

Others  :  https://www.ideals.illinois.edu/bitstream/handle/2142/34229/Win_Si.pdf?sequence=1&isAllowed=y

美国|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Due to timing issues created by high speed applications, simulation of in-put/output (I/O) buffers with an emphasis on signal integrity has been animportant aspect in the design of integrated circuits (IC). Simulation of I/Obuffers however proved to be quite difficult. For vendors it would meanreleasing proprietary information about their I/O buffers which would notonly include a full transistor-level schematic but also full process informa-tion such as transistor oxide thickness. In addition, for designers to performa full transistor-level simulation it would take hours using traditional circuitsimulators such as SPICE.This led to the development of input/output buffer information specifica-tion (IBIS) which was developed at Intel to overcome these obstacles. IBISuses a behavioral modeling method that is based on I-V and V-t curves ob-tained from either direct measurements or circuit simulations. This provideddesigners with a model that contains nonproprietary information about I/Obuffers and provided a fast alternative method to full transistor-level simu-lations.In this thesis we will show how to simulate IBIS models using traditionalcircuit simulators: specifically Synopsys HSpice and Agilent Advanced De-sign System (ADS). IBIS has become widely accepted in industry due tothe fact that it protects the intellectual property of vendors and because ofits standardized format which allows it to be integrated with many circuitsimulators.