Networks-on-Chip (NoCs) are prone to within-die process variation as theyspan the whole chip. To tolerate variation, their voltages (Vdd) carry overprovisionedguardbands. As a result, prior work has proposed to save energyby dynamically managing Vdd, operating at reduced Vdd while occasionallysu ering andxing errors. Unfortunately, these proposals use ad-hoc controllerdesigns that may not work under other scenarios and do not provideerror bounds.This thesis develops a scheme that dynamically minimizes the Vdd of groupsof routers in a variation-prone NoC using formal control-theory methods.The scheme, called Contra, saves substantial energy while guaranteeing thestability and convergence of error rates. Moreover, the scheme is enhancedwith a low-cost secondary network that retransmits erroneous packets forhigher energy e ciency. The enhanced scheme is called Contra+. BothContra and Contra+ are evaluated using simulations of NoCs with 64{100routers. In an NoC with 8 routers per Vdd domain, the proposed schemesreduce the average energy consumption of the NoC by 27%; in a futuristicNoC with one router per Vdd domain, Contra+ and Contra reduce the averageenergy consumption by 37% and 32%, respectively. The performance impactis negligible. These savings are signi cant over the state-of-the-art. Theresults categorically state that formal control is essential to attain a stable,scalable, and energy-efficient design. Additionally, it is found that while thesecondary network helps Contra+ attain higher energy savings, it has a nonnegligiblehardware cost. Hence, Contra is the most cost-effective design.
【 预 览 】
附件列表
Files
Size
Format
View
Systematically controlling the error rates in variation-prone networks-on-chip for energy efficiency
PDF
download
878987797
028-85220240
