Ever-increasing circuit design complexity is driving the need for fast and accurate macro-modeling algorithms to accelerate hierarchical timing. We introduce LibAbs, an effective macro-modeling algorithm that efficiently supports high accuracy, high compression rate, and multi-threading. LibAbs applies tree-based graph reduction techniques to reduce the model size with accuracy values comparable to those of the flat model under a multi-threaded environment. LibAbs outperforms existing tools including the top winners from the TAU 2016 macro-modeling contest in terms of model size, accuracy, and runtime on industry benchmarks. The in-context usage of our abstracted model has also demonstrated promising performance for timing-driven optimizations in large hierarchical designs.
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An efficient and accurate timing macro-modeling algorithm for large hierarchical designs