A scalable I-V model for latch-up in non-collinear PNPN devices is adapted from a previous model for collinear SCR devices. The model is applied to 14-nm FinFET test structures. Layout scaling trends for key latch-up metrics, such as holding and trigger voltage, are captured by the model in circuit simulation. TCAD simulation is used to gain physical insight into the behavior of non-collinear PNPN devices.The dynamic behavior of switched-mode power supplies is simulated by adopting a state-space representation. Piecewise linear models are used to represent the nonlinear switching devices within the power supplies. With state-space representation models, averaging techniques can be used to speed up simulation time. A reduced-order averaged model is used to predict the dynamic turn-on behavior of a flyback converter. A correction factor is added to the model to account for the effect of the snubber circuit. An Elementary Effects algorithm and a Bayesian inference routine are used to fit the averaged model to a more expensive netlist model.State-space models can also be used with the sampled-data method for state vector simulation. This approach is more accurate than the averaged model, but more computationally expensive. Computation time is reduced by calculating the matrix exponential using a decomposition method. With an efficient means of computing the matrix exponential, switching instances are updated reliably from previous computed values, providing a very quick means for event-detection state vector simulation.
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Modeling and numerical methods for power electronic devices