Ultra Low Power Circuits for Internet of Things and Deep Learning Accelerator Design with In-Memory Computing

Ultra Low Power Circuits for Internet of Things;Deep Learning Accelerator Design with In-Memory Computing;Electrical Engineering;Engineering;Electrical Engineering

Choi, MyungjoonKim, Hun Seok ;

University of Michigan

关键词: Ultra Low Power Circuits for Internet of Things;    Deep Learning Accelerator Design with In-Memory Computing;    Electrical Engineering;    Engineering;    Electrical Engineering;   

Others  :  https://deepblue.lib.umich.edu/bitstream/handle/2027.42/144173/myungjun_1.pdf?sequence=1&isAllowed=y

瑞士|英语

来源: The Illinois Digital Environment for Access to Learning and Scholarship

【 摘 要 】

Collecting data from environment and converting gathered data into information is the key idea of Internet of Things (IoT). Miniaturized sensing devices enable the idea for many applications including health monitoring, industrial sensing, and so on. Sensing devices typically have small form factor and thus, low battery capacity, but at the same time, require long life time for continuous monitoring and least frequent battery replacement. This thesis introduces three analog circuit design techniques featuring ultra-low power consumption for such requirements: (1) An ultra-low power resistor-less current reference circuit, (2) A 110nW resistive frequency locked on-chip oscillator as a timing reference, (3) A resonant current-mode wireless power receiver and battery charger for implantable systems. Raw data can be efficiently transformed into useful information using deep learning. However deep learning requires tremendous amount of computation by its nature, and thus, an energy efficient deep learning hardware is highly demanded to fully utilize this algorithm in various applications. This thesis also presents a pulse-width based computation concept which utilizes in-memory computing of SRAM.