A Novel 8x8 CMOS Sensor Array for Thermal Compression Bonding with in-situ XYZ Force and Temperature Measurement

Flip Chip Electronic Packaging CMOS

Laor, Ariel

University of Waterloo

关键词: Flip Chip Electronic Packaging CMOS;   

Others  :  https://uwspace.uwaterloo.ca/bitstream/10012/10452/3/Laor_Ariel.pdf

瑞士|英语

来源: UWSPACE Waterloo Institutional Repository

【 摘 要 】

Flip chip is an electronic packaging technology that is becoming more popular in firstlevel electronic packaging as the need for high density electrical interconnects becomes more relevant.The parallel nature of flip chip and harsh thermomechanical treatment introduces stress tothe microchip and substrate. This is primarily caused by the application of high forces and mismatchin the thermal coefficient of expansion among the materials in the system. Other noise factorslike misalignment, parallelism mismatch, warpage, pillar height variation, and temperaturevariation can weaken the bonding process. Unlike wire bonding, there is a lack of tools availablefor quality assessment of the flip chip process in-situ locally at the interconnect sites. There arehowever some existing wire bonding sensor tools which can be modified to be useful for optimizationof flip chip equipment and processes.A 4x3 mm CMOS chip is designed to record XYZ force and temperature profiles in-situon a 2-dimensional surface during a simulated flip chip process. This was done as a low risk proofof concept to evaluate if the wire bonding tools can be adapted for a flip chip application. 95 μmsquare Al bond pads arranged in a square 8x8 array with 400 μm pitch have embedded piezoresistiveforce sensors and local top metal resistive temperature detectors. The chip is packaged withauxiliary wire bonds to deliver power and capture signals while operating under a bond head. Ballbumps 73 μm in diameter are deposited onto the sensor pads using 4N Au wire. Z sensors are calibratedusing a modified automatic wire bonder. A normalized sensitivity of SN=1.39 mV/V/N ismeasured. Temperature sensors are calibrated at 50 °C using Kelvin probing yielding 186.94 Ω. A3x3 mm Si wafer with Al patterning is used as a dummy pressure plate for touchdowns on thesensor chip with an experimental setup advanced process bond head. Force and temperature signalsare recorded locally at each bump. 80 N force with 200 °C temperature ramps ups areapplied.Evidence of tilt and thermal expansion are detected. The prototype is demonstrated successfullyand identified the most stressful stage of the bonding which occurred during thermaltransients, i.e. during the short lived overshoot period of maximum stress in the force signalsobserved immediately after the application of heat to the system.