NASA’s Gateway program will involve spacecraft (s/c) docking in the outer radiation belt in order to transfer Gateway elements between s/c for transport to lunar orbit. The charging of these s/c to different potentials prior to docking raises the possibility of a damaging electrostatic discharge (ESD) at the time of first contact between the s/c. A proposed mitigation strategy is for first contact to occur prior to docking through a resistor with resistance R that would lower the potential difference at an optimal rate to a sufficiently low value to prevent ESD damage. The coupling of s/c by a resistor can be modeled by SPIS, but for realistic two s/c models SPIS can take hours to simulate the evolution of the s/c surface charges and potentials to an equilibrium state. Our objective is to develop a simpler model of s/c resistive coupling that runs orders of magnitude faster while providing useful first design estimates of the time variation of the s/c potentials, current through the resistor, and how these vary with R and s/c configuration This configuration is defined by the relative separation and orientation of the s/c, and their solar illumination. The configuration and geometry of the s/c determine their capacitive coupling. The s/c capacitances are computed using Nascap-2K. This poster presents the first version of such a model, and initial tests.
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