Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array.

Learn, Mark Walter

Sandia National Laboratories

关键词: Positioning;    99 General And Miscellaneous//Mathematics, Computing, And Information Science;    Microprocessors;    Architecture;    Flexibility;   

DOI  :  10.2172/1013229
RP-ID  :  SAND2011-2733
RP-ID  :  AC04-94AL85000
RP-ID  :  1013229

美国|英语

来源: UNT Digital Library

【 摘 要 】

Node-based architecture (NBA) designs for future satellite projects hold the promise of decreasing system development time and costs, size, weight, and power and positioning the laboratory to address other emerging mission opportunities quickly. Reconfigurable field programmable gate array (FPGA)-based modules will comprise the core of several of the NBA nodes. Microprocessing capabilities will be necessary with varying degrees of mission-specific performance requirements on these nodes. To enable the flexibility of these reconfigurable nodes, it is advantageous to incorporate the microprocessor into the FPGA itself, either as a hard-core processor built into the FPGA or as a soft-core processor built out of FPGA elements. This document describes the evaluation of three reconfigurable FPGA-based soft-core processors for use in future NBA systems: the MicroBlaze (uB), the open-source Leon3, and the licensed Leon3. Two standard performance benchmark applications were developed for each processor. The first, Dhrystone, is a fixed-point operation metric. The second, Whetstone, is a floating-point operation metric. Several trials were run at varying code locations, loop counts, processor speeds, and cache configurations. FPGA resource utilization was recorded for each configuration.