A Novel Approach to Implement a High Speedand Low Memory Separable 2D DWTArchitecture

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering

article

N.A.Raju Desamsetti¹  G.Sita Annapurna¹ 

[1] Dept. of ECE, Sri Vasavi Institute of Engineering and Technology

关键词: Discrete Wavelet Transformation;    Xilinx ISE;    System Security.;   

DOI  :  10.15662/ijareeie.2014.0310051

来源: Research & Reviews

【 摘 要 】

The basic idea behind wavelets is to analyze according to scale. Indeed, some researchers in the wavelet field feel that, by using wavelets, one is adopting a perspective in processing data. Wavelets are functions that satisfy certain mathematical requirements and are used in representing data or other functions. In this paper, separable pipeline architecture for fast computation of the 2D DWT with a less memory and low latency is proposed. The low latency and less memory is achieved by proper designing of two 1-D DWT filtering processes and also efficiently transferring the data between the two 1-D DWT filters. The functionality of the architecture is verified through modelsim simulator and the synthesis is performed using XILINX ISE.

【 授权许可】

Unknown