LDCPUF: A novel FPGA-based physical unclonable function with ultra-low hardware cost

IEICE Electronics Express

article

Luo Zufeng¹  Yuan Guoshun¹ 

[1] Institute of Microelectronics of Chinese Academy of Sciences;University of Chinese Academy of Sciences

关键词: RO PUF;    FPGA;    PDL;    hardware cost;   

DOI  :  10.1587/elex.19.20220246

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

The physical unclonable function based on ring oscillator (RO PUF) is a traditional design suitable for FPGA implementation, but such designs have the disadvantage of low hardware efficiency. This article proposes a new FPGA-based ring oscillator PUF, called loop delay configurable (LDC) PUF. The construction of LDC PUF relies on configurable delay units (CDUs). An LDC PUF configured with n CDUs can generate 2n-1(2n-1) response bits. Additionally, we apply the programmable delay lines technology to enhance the reliability of LDC PUF. Compared with the traditional RO PUFs, the LDC PUF has good uniqueness (48.52%) and reliability (96.91%), and most importantly, it has ultra-low hardware cost.

【 授权许可】

CC BY