Miniaturization of CMOS

Micromachines

Xuewei Zhao¹  Jiahan Yu¹  Jinbiao Liu¹  Jinjuan Xiang¹  Wenjuan Xiong¹  Xiaobin He¹  Hong Yang¹  Junjie Li²  Zhenzhen Kong³  HenryH. Radamson³  Hushan Cui³  Shihai Gu³  Yong Du³  Guilei Wang³  Qingzhu Zhang³  Jianfeng Gao³ 

[1] Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Fert Beijing Institute, Big Data Brain Computing (BDBC), Beihang University, Beijing 100191, China;;Key Laboratory of Microelectronics Devices &

关键词: FinFETs;    CMOS;    device processing;    integrated circuits;   

DOI  :  10.3390/mi10050293

来源: DOAJ

【 摘 要 】

When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.

【 授权许可】

Unknown